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MC14517B Register

MC14517B Register Series Datasheet

The ON SEMICONDUCTOR MC14517B dual 64-bit static shift register consists of two identical, independent, 64-bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, regardless of the state of the write enable input. An output is disabled (open circuited) when the write enable input is high. During this time, data appearing at the data input as well as the 16-bit, 32-bit, and 48-bit taps may be entered into the device by application of a clock pulse. This feature permits the register to be loaded with 64 bits in 16 clock periods, and also permits bus logic to be used. This device is useful in time delay circuits, temporary memory storage circuits, and other serial shift register applications.


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MC14517B MC14517B-D MC14517B/BEAJC MC14517BAL
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MC14517BCLD MC14517BCLDS MC14517BCP MC14517BCPD
MC14517BCPG MC14517BDW MC14517BDWG MC14517BDWR2
MC14517B Register Package Types
family combined
Plastic Dual-In-Line Package (PDIP)

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