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MC100EP51 Flip-Flop

MC100EP51 Flip-Flop Series Datasheet

The ON SEMICONDUCTOR MC10/100EP51 is a differential clock D flip?flop with reset. The device is functionally equivalent to the EL51 and LVEL51 devices. The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip?flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EP51 allow the device to be used as a negative edge triggered flip-flop.


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MC100EP51D MC100EP51DG MC100EP51DR2 MC100EP51DT
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