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EP1M Mercury PLD

EP1M Mercury PLD Series Datasheet

ALTERA Mercury devices integrate high-speed differential transceivers and support for CDR with a speed-optimized PLD architecture. These transceivers are implemented through the dedicated serializer, deserializer, and clock recovery circuitry in the HSDI and incorporate support for the LVDS, LVPECL, and 3.3-V PCML I/O standards. This circuitry, together with enhanced I/O elements (IOEs) and support for numerous I/O standards, allows Mercury devices to meet high-speed interface requirements.

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EP1M120F484C5 EP1M120F484C5ES EP1M120F484C5N EP1M120F484C6
EP1M120F484C6M EP1M120F484C7 EP1M120F484C7N EP1M120F484C8
EP1M120F484C8AES EP1M120F484I6 EP1M350F780C5 EP1M350F780C6
EP1M350F780C6ES EP1M350F780C7 EP1M350F780I6
EP1M Mercury PLD Package Types
family combined
Plastic Ball Grid Array (PBGA)
family combined
Plastic Ball Grid Array (PBGA)

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