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74FCT388915 3.3V Low Skew PLL-Based CMOS Clock Driver

74FCT388915 3.3V Low Skew PLL-Based CMOS Clock Driver Series Datasheet

The INTEGRATED DEVICE TECHNOLOGY (IDT) FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock distribution for high performance PCs and workstations. One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of the phase/ frequency detector, charge pump, loop filter and VCO. The VCO is designed for a 2Q operating frequency range of 40MHz to f2Q Max.

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74FCT388915-T133J 74FCT388915T-100 74FCT388915T-100J 74FCT388915T-100PY
74FCT388915T-133 74FCT388915T-133PY 74FCT388915T-150PY 74FCT388915T-70J
74FCT388915T-70PY 74FCT388915T100J8 74FCT388915T100PY8 74FCT388915T150J
74FCT388915TBPYG 74FCT388915TCJG 74FCT388915TCJG8 74FCT388915TCPYG
74FCT388915TDJG 74FCT388915TDJG8 74FCT388915TEJG 74FCT388915TI33PY

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