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74FCT162H501 18-Bit Registered Transceivers

74FCT162H501 18-Bit Registered Transceivers Series Datasheet

These TEXAS INSTRUMENTS (TI) 18-bit universal bus transceivers can be operated in transparent, latched or clock modes by combining D-type latches and D-type flip-flops. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For A-to-B data flow, the device operates in transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B-to-A is similar to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA.


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74FCT162H501ATPA 74FCT162H501ATPV 74FCT162H501ATPV8 74FCT162H501CTPA
74FCT162H501CTPACT 74FCT162H501CTPV 74FCT162H501CTPVC 74FCT162H501ETPVC
74FCT162H501ETRA
74FCT162H501 18-Bit Registered Transceivers Series Part Photos
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74FCT162H501 18-Bit Registered Transceivers


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74FCT162H501ATPA 74FCT162H501ATPV 74FCT162H501ATPV8 74FCT162H501CTPA
74FCT162H501CTPACT 74FCT162H501CTPV 74FCT162H501CTPVC 74FCT162H501ETPVC
74FCT162H501ETRA

74FCT162H501 18-Bit Registered Transceivers


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74FCT162H501 18-Bit Registered Transceivers


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74FCT162H501 18-Bit Registered Transceivers Part Photos
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74FCT162H501 18-Bit Registered Transceivers
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74FCT162H501 18-Bit Registered Transceivers
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74FCT162H501 18-Bit Registered Transceivers
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74FCT162H501 18-Bit Registered Transceivers
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74FCT162H501 18-Bit Registered Transceivers

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