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The INTEGRATED DEVICE TECHNOLOGY (IDT) FCT162500T 18-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch enable (LEAB and LEBA) and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B port to A port is similar but uses OEBA, LEBA and CLKBA. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.
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74FCT162500ATPV | 74FCT162500ATPVCT | 74FCT162500ATPVG | 74FCT162500CTPVCT |
74FCT162500CTPVG | 74FCT162500NBATPV |
74FCT162500 Fast CMOS 18-Bit Registered Transceiver Series Part Photos | |||
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74FCT162500ATPV | 74FCT162500ATPVCT | 74FCT162500ATPVG | 74FCT162500CTPVCT |
74FCT162500CTPVG | 74FCT162500NBATPV |
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